1. Field of the Invention
The present invention relates generally to powering a circuit, and more specifically, to a method of powering a circuit by alternating the circuit power supply connections between in series with and in parallel with a storage capacitor.
2. Background of the Invention
Present day processors and other integrated circuits (ICs) operating at low power supply voltages typically include an internal voltage step-down circuit, or employ a local external voltage regulator module (VRM) to reduce the voltage distributed to the IC. The IC may, for example, use the power supply voltage provided to the IC for some circuits, such as clock synthesizers, while circuits such as VLSI (very large scale integration) core, are operated from a voltage that is half or less than that of the power supplies distributed through a system including the IC.
The use of external VRMs is costly and therefore an internal solution is desirable. A typical internal solution employed in some such ICs is either a linear regulator that lowers the power supply voltage, which increases power dissipation in the IC and wastes power, or an arrangement such as a capacitive voltage divider. A capacitive voltage divider can be reasonably efficient, but the flying capacitor used in the voltage divider requires two terminals of the IC, with an additional terminal required for filtering the output of the voltage divider circuit. The size of the capacitor typically required for a voltage divider having the generally necessary current output is prohibitive for inclusion in an IC. Therefore, the three extra terminals are typically required when an internal capacitive voltage divider is used to reduce the input power supply voltage in an IC.
Another solution that has been used, is an integrated switching power converter using an external inductor and capacitor. Such a converter requires only one extra IC terminal in addition to the filter capacitor terminal. However, an external inductor is typically required, which is typically expensive, bulky and is a source of EMI (electro-magnetic interference).
One additional solution that has been proposed, divides the circuits within an IC into two groups, which are then powered in a series power supply connection, with a linear shunt current regulator provided in parallel with each of the groups of circuits. By continuously balancing the average current of each of the circuit group/shunt regulator parallel combinations, the midpoint between the two series-connected circuit groups can be maintained at half of the power supply voltage. The only power that is wasted is any shunt current required to balance the currents consumed by the two groups of circuits, multiplied by half of the power supply voltage.
However, it is generally difficult to partition an IC into two groups of circuits with equal power consumption. Also, some circuits are not amenable to such division, since the two separate circuit groups will require level translation in order to communicate between the circuit groups. Level translation consumes circuit area and adds power consumption, so any signals that are connected between the circuit groups increase the area requirements and power consumption. Further, even when such an IC can be partitioned, the balance of current consumption will generally not be the same for all operating modes and/or states of an IC. Finally, when the circuit groups are digital, having two separate digital routes adds interconnect area and increases the delays through the associated signal paths.
Therefore, it would be desirable to provide a method and apparatus for reducing the power supply voltage provided to an IC and powering a group of circuits within the IC, such that high efficiency and low power dissipation are maintained using few external terminals of the IC and a minimum number of external discrete components. It would further be desirable to provide such an IC, in which circuit real estate, complexity and EMI performance are also not substantially compromised by the inclusion of the apparatus.